MATLAB/Simulink FPGA-In-The-Loop (FIL) Connection Issue with Zybo Z7 20

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I encountered an issue when attempting to send a bitstream file to program my Zybo Z7 board using Vivado 2020.1 for an FPGA-in-loop with Simulink. Below is the error message I received:
I am aware that the Zybo board is not yet supported by MATLAB. What steps should I take to resolve this issue? Additionally, if I purchase the Arty A7-100T board (https://digilent.com/shop/arty-a7-100t-artix-7-fpga-development-board/?srsltid=AfmBOoqSJZFmnN32QqiorkfpDJpZGWHxxwa_fzSc0o1MpIyNG6jYYAag), will I encounter the same error?"

回答(1 个)

R
R 2024-9-13
The Arty board, based on the Zynq platform, is not officially supported by MathWorks. However, you can configure and register this custom board for use in the Zynq® workflow by following the steps outlined in the MathWorks documentation: https://www.mathworks.com/help/hdlcoder/ug/define-and-register-custom-board-and-reference-design-for-zynq-workflow.html
The diagnostics indicate that the issue is related to the hardware connection rather than the type of board. Therefore, purchasing a new board won't resolve the issue unless the connection is properly established.
The logs you are seeing are from the Vivado command prompt, as MathWorks launches Vivado tools using a batch Tcl script to execute Tcl commands.
The specific error suggests t,hat Vivado is unable to open the hardware target (e.g., the FPGA board), as the hardware device at the specified chain_position is either not found or cannot be communicated with. To address this, ensure that your board is powered on, and verify that the JTAG/USB download cable is connected correctly to both the board and your computer.
To troubleshoot this:
1. Verify hardware detection in Vivado. To do this:
  • Open Vivado Hardware Manager and check if you can detect or program the device.
  • Manually attempt to open the target and verify whether the hardware appears in the list. If it doesn't, Vivado may not be detecting the hardware.
2. You can also check for the hardware using the Vivado Tcl console with the following commands:
open_hw_target
get_hw_devices
  • If the device is detected, restart MATLAB and set up the Vivado tools and your Zybo board again. If not, the issue is likely a connection problem.
3. Make sure you have downloaded the Lab Edition from the AMD Unified Installer for FPGAs & Adaptive SoCs, as this version provides the necessary drivers and capabilities to program an FPGA device.
4. If you have multiple FPGA devices connected in a JTAG chain, try working with a single device to simplify debugging.
5. You mentioned using Vivado 2020.1, but the retry dialog shows Vivado 2022.1. Ensure that the version you are using matches the settings in both MATLAB and Vivado.
6. If the issue persists, try running the setup on a different computer or with another Zybo board to rule out hardware or environment-specific issues.
By following these steps, you can identify whether the problem lies in the hardware connection or the software configuration and resolve the issue accordingly.
Hope this helps.
  2 个评论
Oussama
Oussama 2024-9-14
编辑:Oussama 2024-9-14
I added the Zybo Z7-20 board file to the Xilinx board library and also installed the Xilinx Hardware Support Package. I adjusted the JTAG chain position from 1 to 2, since I am using the JTAG USB port to communicate with the board. Attached is the XML file for the Zybo board that I used using this wizard
.
and this is the xml file that i used
After that, I built the FIL block in Simulink using the FilWizard toolbox. I successfully obtained the FIL Simulink block and, when I loaded the .bit file onto the board, the process completed successfully.
The green LED in the board turns on, Ok perfect.
Finaly when i wanted to run the sumulation in simulink
I got this error.
The link you gave me uses the Ethernet comunition and the sd boot micro not the JTAG

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