Not able to plot delay for sine wave using triggered subsystem

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Siddharth 2025-1-20

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评论： Siddharth 2025-1-22

I am trying to use delay within the triggered subsystem and I am still getting a flat line as plot , I have tried increasing sample time or adding delay outside of the subsystem but still I am not getting the answer.

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回答（1 个）

Vinay 2025-1-21

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delay_triggeredsubsys.slx

Hi @Siddharth,

The triggered subsystem triggers the system at the rising edge of the control signal and holds the signal value until the next rising edge.

To incorporate a delay within this subsystem, a "Delay" block can be added, which allows for the introduction of a specified number of cycle delays. I have attached the Simulink model illustrating how the delay is implemented within the subsystem block.