Is there any way to avoid root-level ports being optimized away when generating AUTOSAR code using Embedded Coder?

2025 4 18
1 个回答
回答已采纳
更新时间：2025 4 18
17 次查看（30 天）

0 个投票

When trying to run a SIL simulation of my model, I get errors about unknown type names like:
...modelpath_autosar_rtw/sil/xil_interface.c:1198:8: error: unknown type name 'xyz1'
 static xyz1
    ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~
...modelpath_autosar_rtw/sil/xil_interface.c:1448:8: error: unknown type name 'xyz2'
 static xyz2 abc1;
    ^~~~~~~~~~~~~~~~~~~~
...modelpath_autosar_rtw/sil/xil_interface.c:1451:8: error: unknown type name 'xyz3'
 static xyz3
    ^~~~~~~~~~~~~~~~~~~~
...modelpath_autosar_rtw/sil/xil_interface.c:1458:8: error: unknown type name 'xyz4'
 static xyz4 abc2;
    ^~~~~~~~~~~~~~~~~~~
...modelpath_autosar_rtw/sil/xil_interface.c: In function 'xilInitialize':
.....
How can I avoid these errors and successfully run my model in SIL? (In MIL it runs fine.)
Additionally, when exporting my AUTOSAR architecture to ARXML and then re-importing it, I notice that some root-level ports are missing. Is there a way to preserve all ports, even if they are not used inside the components?

请先登录，再回答此问题。

 采纳的回答

0 个投票

Unfortunately, this is a current limitation in the AUTOSAR code generation workflow.
Embedded Coder generates type definitions only for types that are actually used in the model. If your root-level inports are connected to terminator blocks, the tool considers them unused. As a result, there are no data accesses for these data elements in the exported ARXML, and the types are not described in Rte_Type.h. This leads to the "unknown type name" errors you see during SIL simulation, since the code expects types that were never generated.
The same logic applies to AUTOSAR architecture export/import: unused ports (those not utilized inside components) are optimized away during export, so they do not appear in the ARXML and are missing when you re-import the architecture.
This limitation is documented since R2025a in https://www.mathworks.com/help/autosar/ug/limitations-and-tips-codegen.html
Workaround:
To avoid this optimization and ensure that the types are generated and the ports are preserved:
  1. Insert a Signal Conversion block between your input and the terminator block.
  2. Set the Signal Conversion block to "Signal copy".
  3. Enable the option "Exclude this block from 'Block reduction' optimization".
This will ensure that the port is considered "used", so its type will be included in Rte_Type.h and preserved in the exported ARXML, preventing both the SIL errors and missing ports on import.

更多回答（0 个）

类别

在 帮助中心 和 File Exchange 中查找有关 Deployment, Integration, and Supported Hardware 的更多信息

产品

版本

R2021b

标签

Community Treasure Hunt

Find the treasures in MATLAB Central and discover how the community can help you!

Start Hunting!

Translated by