HDL code geneartaion for DPWM (digital pulse-width modulation)

2015 7 13
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更新时间：2015 7 14
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Hi, everyone. I need to generate any conventional DPWM (10-bit or any other size) block HDL code targeted to generic or ASIC, so that it can be used in cadence etc. Usually DPWM consists of delay elements, Mux, SR-flip flop, and sometimes a counter etc. (as attached) can we generate "delay cell" HDL code? Thanks in advance.

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The delay block, switch (including multi-port switch) and HDL Counter (as well as counter) blocks can be used for HDL code generation.
Type hdllib to see a list of blocks supported for HDL code generation.

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