How are you checking it at the moment?
Maybe this would work:
The integrators in simulink have an inbuilt "condition check". When this is violated, you get a signal from an additional output port of the integrator (you can switch this on in the integrator block). You can also get the initial value of the integration externally.
Now, if this value is violated at a particular time step, it should not have been violated one time step earlier. Hence, keep a version of the delayed signal ( e.g. with a memory block ), and use this as initial value for the integration.
Like this, every time your limit is violated, you go back one time step and recompute the signal from there. Note however that this only resets this particular signal and not the whole system, depends what you want.
