How to use design verifier with incompatible simulink models?

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Tushar Agarwal
Tushar Agarwal 2016-7-10
回答： Akshat Dalal 2025-3-2
I have a Simulink model with an integrator block that cannot be stubbed while running the design verifier, rendering the model incompatible with the design verifier. Is there a way to increase the coverage of such a model other than manually building test cases?

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回答（1 个）

Akshat Dalal
Akshat Dalal 2025-3-2
Hi Tushar,
You will have to write your own block replacement rules to handle the unsupported blocks for SLDV. Please refer the following documentations for more information:
Thanks

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