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Does anyone know what this error means? "Failed to receive a control packet from the FPGA target."

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Pablo Medina 2016-9-12

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https://ww2.mathworks.cn/matlabcentral/answers/302800-does-anyone-know-what-this-error-means-failed-to-receive-a-control-packet-from-the-fpga-target

Im executing fpga-in-the-Loop simulation from MATLAB. My target device is the Virtex 5 XUPV5 LX110T. Everything looks fine even the loading bitstream is complete successfull, but i get this error "Failed to recieve a control packet from the FPGA target."

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