Simulink "Find block" HDL Coder

DN
2016 9 16
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更新时间：2016 9 21
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How can I use HDL compatible blocks to portray the "find block" functionality. http://uk.mathworks.com/help/simulink/slref/find.html#bsdkmvh-8
Unfortunately the find block is not HDL compatible, so there must be other ways to output an index based on a condition. I have the Matlab code:
idx = find(gs >= g, 1, 'last')
that I need to simulate in Simulink with HDL coder and I don't think a user defined function block will work as it will just contain find() which is not HDL compatible. Thanks for your help in advance.

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I believe this is answered with the other question you posed on the break command. See how idx is a persistent value - that means it stores its value across calls. If you choose to update only when idx is 0, you get the the first value of gs >= g. If you update all the time you get the last value.
You can make this work for a 2D case as well.
In general, you should avoid having all these comparisons in a for loop. The entire for loop will run in one "clock", so your FPGA code will run very slowly. You are better off streaming the gs values in one at a time and taking one "clock" to compare one value of gs to g (the second code example in my answer to your other question ).

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DN
DN 2016-9-21
Indeed they are related as I broke the problem into two sections only to cause myself more problems (with the "break" command). I replied at http://uk.mathworks.com/matlabcentral/answers/303870-the-most-interesting-head-scratching-break-command-problem-in-simulink-these-days#answer_235514 and will therefore close this case.

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Assuming that gs and g are two vectors that are streaming in, you can compare each value of gs to g with the relational operator block and if gs is >= g, store the index into a register. Keep the index updated for each value of gs and g coming in, so that you always have an updated index stored in a register. Since you always update the register, when gs and g are done streaming in, you will have the last value of gs >= g.

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DN
DN 2016-9-17
编辑：DN 2016-9-18
Hi Bharath. It (gs) is actually a matrix signal [80 x 64] (because I'm trying to avoid a for loop within Simulink). In Matlab yes I would iterate through each vector in the for loop and end up with an index value between 1-80.
a) Would your theory still apply using a 2D signal or do I need to break it up into vectors with some sort of column/row selector and then use the relational operator block?
b) What do you mean by register? Do you mean the HDL FIFO block or some sort of RAM or memory block http://uk.mathworks.com/help/simulink/slref/hdlfifo.html or just a virtual bus within Simulink?
See my snippet:
L = 64;
optwv = zeros(1,L); %[1 x 64]
WIN = rand(1,80); %[1 x 80]
optws = rand(80,64); %[80 x 64]
for k = 1: L
gs = optws(:,k)'./WIN;
idx = find(gs >= g, 1, 'last')
optwv(k) = g*WIN(idx);
end
(g is a scalar).
Thanks

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