S-function configured with buses, does it support design verifier.

1 次查看(过去 30 天)
S-function with Buses as inputs and outputs, does it support for automatic test generation using design verifier. In attached document i have given clear explanation regarding this issue.

回答(0 个)

类别

Help CenterFile Exchange 中查找有关 Verification, Validation, and Test 的更多信息

标签

Community Treasure Hunt

Find the treasures in MATLAB Central and discover how the community can help you!

Start Hunting!

Translated by