Dear all,
I'm learning this nice feature of Simulink, namely the Model References. I think that way you can always keep your model clean, and you can test blocks separately before assembling them. However, I encountered several problems as I will discuss below. The model I'm simulating include a continuous-time first-order process modeled as a transfer function, and a discrete time PI controller. When embedding the process and the PI controller in subsystems, everything works fine, but if I use a model for the process and a model for the PI controller, and reference them in a new model several problems arise:
1. Algebraic loop (solved by using a time delay unit with inherited sampling time in the feedback channel of the complete scheme).
2. I get the "Warning: The model 'DT_PI' does not have continuous states, hence Simulink is using the solver 'VariableStepDiscrete' instead of solver 'ode45'. You can disable this diagnostic by explicitly specifying a discrete solver in the solver tab of the Configuration Parameters dialog, or by setting the 'Automatic solver parameter selection' diagnostic to 'none' in the Diagnostics tab of the Configuration Parameters dialog." -- I set "none" in the diagnostic tab in the Configuration Parameters Dialog in all the models, but I still have this warning.
3. Mismatching between the sampling times. "Warning: Inconsistent sample times. Sample time ([0, 1]) of signal driving input port 1 of 'ModelRefTL/Model1' differs from the expected sample time ([0.1, 0]) at this input port. Warning: Inconsistent sample times. Sample time ([0, 1]) of signal driving input port 2 of 'ModelRefTL/Model1' differs from the expected sample time ([0.1, 0]) at this input port. Warning: Inconsistent sample times. Sample time ([0.1, 0]) of signal driving input port 1 of 'ModelRefTL/Model' differs from the expected sample time ([0, 0]) at this input port." -- How can I accommodate these sampling times mismatches?
4. "When a unit delay block inherits continuous sample time, its behavior is the same as the memory block. Unit delay block's time delay will not be fixed and could change with each time step. This might be unexpected behavior. Normally, a unit delay block uses discrete sample time. You can disable this diagnostic by setting the 'Discrete used as continuous' diagnostic to 'none' in the Sample Time group on the Diagnostics pane of the Configuration Parameters dialog box." -- In-fact I used this unit time delay with inherited sampling time just to avoid using memory blocks and to cancel the algebraic loop. However, even if do as suggested in the Diagnostic Dialog, I still experience the warning in the command line.
How can I solve those problems? The Matlab version is the 2009b.
Thanks,
Ubaldo
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