HDL workflow Advisor image

1 次查看（过去 30 天）
Yu Chen
Yu Chen 2018-7-1
回答： Eric Cigan 2023-12-18
I will use the HDL workflow to do image processing on the FPGA.
How do I input the image will not be a bunch of interfaces?
My image is 2D, how does the test bench code describe it?

请先登录，再回答此问题。

回答（2 个）

Bharath Venkataraman
This Vision HDL Toolbox page shows the capabilities provided for image processing on an FPGA. If you have the product, try doc visionhdl and look at the examples.
To target your design easily onto an FPGA, the Xilinx Zynq Support package will help.
Eric Cigan
Eric Cigan 2023-12-18
Please note that starting with the 24a general release, the features of the Xilinx Zynq Support from Vision HDL Toolbox will be available thorugh Xilinx Zynq SoC Support from SoC Blockset.

类别

在 Help Center 和 File Exchange 中查找有关 Xilinx FPGA and SoC Devices 的更多信息

标签

Community Treasure Hunt

Find the treasures in MATLAB Central and discover how the community can help you!

Start Hunting!

Translated by