Single data type as std_logic_vector after HDL Coder.
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Hi,
As the title says, i have a variable with single data type as real after generating HDL code with HDL coder, but I need for it to become std_logic_vector after generating the code.
How can I do it?
I have already configured for the inputs to become std_logic_vectors:
What I need:
What I get:
I tryed to convert it first to binary and then generate the code, but didn't work. I am doing other trials but without success.
Thank you in advance.
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