Device arm_dap_0 is not programmable with FPGA in the loop tutorial.

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Eduardo Flores 2020-11-29

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评论：振款陈 2024-8-14

采纳的回答： Aman Vyas

Hello all, i'm following the FPGA in the loop tutorial and i'm stuck with the following error: Device arm_dap_0 is not programmable.

I created a custom board file using the specs given by digilent. I have an Arty Z7020.

I'm working on Ubuntu 18.04.05 LTS and using a micro-USB cable connected to the progUART port of my board. The blue jumper (don't know if that is the name) is connected in JTAG configuration.

I have already downloaded the VHDL verifier, and generation for Xillinx add ons. And currently run the Vivado WebPAck with Vitis on a student license.

Thanks in advance!

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Walter Bomela 2023-3-31

The FPGA part is at JTAG Chain Position 2.

振款陈 2024-8-14

ZYNQ FPGA-in-the-loop JTAG的设置

在用Matlab/Simulink开发FPGA时，用FIL进行程序的验证是非常有效的。

我买的是正点原子的开发板，用FilWizard工具在Matlab创建自己的FPGA设备时遇到了无法下载程序，和下载程序后无法运行的问题。

多次尝试后，确定了是Jtag参数设置的问题。

JTAG chain positon 选择 2

IR length before 选择 4

IR length after 选择 0

我觉得zynq系列的芯片都可以用这个配置进行连接。

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Aman Vyas 2020-12-16

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Hi,

Arty_Z7020 is the member of zynq family and this feature is not supported for HDL_verifier workflow as of now.

You can use other such configurations which supports as of now.

Pre release can be seen here which will be added in later features:

Release Notes for HDL Verifier - MATLAB & Simulink (mathworks.com)

Hope it helps !

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Eduardo Flores 2020-12-16

Hello Aman, in the HDL_verifier web page says it does support Zynq 7000 boards https://es.mathworks.com/hardware-support/xilinx-fpga-board.html?s_tid=srchtitle

Virtex-7, Kintex-7, Artix®-7, Zynq-7000

Also, what do you mean by "use other such configurations". Get another FPGA like the Virtex?

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Ahmad Reda 2020-12-2

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I am trying to deploy DNN model on ZedBorad and I am getting the same error.

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Eduardo Flores 2020-12-28

That's odd. I changed to a Zedboard and the problem dissappeared.

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