Synthesizable VHDL code for filter design (using FDATOOL) not obtained for MATLAB R2015a

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Arun Satheesan
Arun Satheesan 2021-8-4
回答： Bharath Venkataraman 2021-8-5
Sir,
We designed a 6th order IIR low pass filter using FDATOOL in MATLABR2015a. We generated the VHDL code for the same using the 'Generate HDL' option under Analysis menu. However, in the generated VHDL code the filter coefficients were of datatype, 'real' and hence could not be synthesized by the Synplify tool in Libero IDE. Kindly guide us on the procedure to generate a synthesizable VHDL code for filter design using MATLAB.
A code snippet is provided below for reference:
LIBRARY IEEE;
USE IEEE.std_logic_1164.all;
USE IEEE.numeric_std.ALL;
ENTITY filter IS
PORT( clk : IN std_logic;
clk_enable : IN std_logic;
reset : IN std_logic;
filter_in : IN real; -- double
filter_out : OUT real -- double
);
END filter;
----------------------------------------------------------------
--Module Architecture: filter
----------------------------------------------------------------
ARCHITECTURE rtl OF filter IS
-- Local Functions
-- Type Definitions
TYPE delay_pipeline_type IS ARRAY (NATURAL range <>) OF real; -- double
-- Constants
CONSTANT scaleconst1 : real := 3.3591257762030907E-01; -- double
CONSTANT coeff_b1_section1 : real := 1.0000000000000000E+00; -- double
CONSTANT coeff_b2_section1 : real := 2.0000000000000000E+00; -- double
Thanks and Regards,
Arun Satheesan

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回答（1 个）

Bharath Venkataraman
This is becasuse the filter is not quantized.
Use the Quantization panel in fdatool to create a fixed-point biquad filter. If you generate HDL for that filter, you will find that it has fixed-point settings.

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