This small example generates SystemVerilog DPI components from MATLAB, for use in a Universal Verification Methodology (UVM) testbench. The components are a reference model that is used in the UVM scoreboard, and a waveform generator that is used as a UVM sequence. It contains run scripts for Mentor Questa, Synopsys VCS, and Cadence Incisive.
This model was referred to by the article posted here:
https://verificationacademy.com/verification-horizons/june-2015-volume-11-issue-2/Reuse-MATLAB-Functions-and-Simulink-Models-in-UVM-Environments-with-Automatic-SystemVerilog-DPI-Component-Generation
For more information on integrating MATLAB and Simulink models into UVM environments:
http://www.mathworks.com/discovery/uvm-verification.html
引用格式
MathWorks HDLVerifier Team (2024). SystemVerilog DPI component generation from a MATLAB FFT (https://www.mathworks.com/matlabcentral/fileexchange/56159-systemverilog-dpi-component-generation-from-a-matlab-fft), MATLAB Central File Exchange. 检索时间: .
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R2021b
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- Code Generation >
- Code Generation > HDL Verifier >
- FPGA, ASIC, and SoC Development > HDL Verifier >
- Test and Measurement > Data Acquisition Toolbox > Periodic Waveform Generation >
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DPI_UVM_FFT_MATLAB_example
版本 | 已发布 | 发行说明 | |
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1.1.2 | Re-instated support for Synopsys VCS. See README.txt for instructions. |
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1.1.1.1 | Fixed issue with previous upload where the hdlsrc folder was missing |
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1.1.1.0 | Updated Questa simulation options and added a note on how to debug when DPI generation fails due to a name collision with the rms function. |
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1.1.0.0 | Added support for Synopsys VCS |
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1.0.0.1 | Updated license
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1.0.0.0 |