HDL Verifier Support Package for Microchip

作者: MathWorks HDLVerifier Team
Debug and test HDL code on Microchip FPGAs using FPGA-in-the-loop
5.0
(3)
1.2K 次下载
更新时间 2025/9/17
HDL Verifier™ Support Package for Microchip FPGA Boards contains the board definition files for FPGA-in-the-loop (FIL) simulation with HDL Verifier on supported Microchip FPGA and SoC FPGA boards. With FIL simulation, use MATLAB® or Simulink® to test designs in real hardware for any existing HDL code. The HDL code can either be manually written or generated from a model subsystem using HDL Coder.
Supported boards include the
  • PolarFire™ Evaluation Kit
  • SmartFusion®2 Advanced Development Kit (M2S150-ADV-DEV-KIT)
  • RTG4 Development Board (RTG4-DEV-KIT)
This support package is functional for R2018a or higher.
MATLAB 版本兼容性
创建方式 R2018a
兼容 R2018a 到 R2025b 的版本
平台兼容性
Windows macOS (Apple 芯片) macOS (Intel) Linux
类别
在 Help Center 和 MATLAB Answers 中查找有关 FPGA, ASIC, and SoC Development 的更多信息

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