photo

Shady


Last seen: 4 months 前 |  自 2022 起处于活动状态

Followers: 0   Following: 0

Programming Languages:
Python, C++, MATLAB, Arduino

统计学

  • Thankful Level 1
  • First Review

查看徽章

Feeds

排序方式:

提问


HDL System Blockset FPGA design generation Error
I am trying to downsample my data in FPGA using xilinx SoC blockset. I downsampled data using FIR Filters and downsampler and it...

2 years 前 | 1 个回答 | 0

1

个回答