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How can I change the default axi width in VCK190 reference file from 32 to 64 bits?
I am trying to build IP using the provided VCK190 SoC template. However, the maximum allowed AXI width from software to the FPGA...
5 months 前 | 1 个回答 | 0
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How to create this in Simulink? std_logic_vector16 vec[0:3]
I want to create an array that can hold 4 elements, each of which is a 16-bit vector as an input to an IP block so that when I g...
1 year 前 | 1 个回答 | 0
