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Sarfaraz Ahmed
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Unable to resolve the name rm.ranova Error
Hi Everyone, I am running anova analysis and found such error while checking RM Anova results. But this error coming continou...
2 years 前 | 1 个回答 | 0
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Intercept of each line to y-line
Hello folks, I am making curve fit plot for some data and trying to make intercept point of each data line with y-line. For e...
2 years 前 | 2 个回答 | 0
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Plot Mean over Box Charts for two groups
I am running a piece of example code and trying to plot mean value over box chart for two groups. For example, in 2015 case, i...
2 years 前 | 1 个回答 | 0
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Repeated measure ANOVA in MATLAB
Hi Everyone, I am trying to do ANOVA statistical analysis on the attached data set. This is just example data set to know how t...
2 years 前 | 1 个回答 | 0
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How to plot shaded areas with legend
Hello MATLAB Community, I am trying to shade PSD spectrum for specific region for example : f(ind1:ind2) -> nothing f(ind3:...
3 years 前 | 1 个回答 | 0
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How to do PSD measuremnet for the given signal
Hi, I am doing PSD (ms2) analysis for the frequency spectrum attached in the figure. I am able to find PSD but the results are n...
3 years 前 | 1 个回答 | 0
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Saving and Loading ECG data (.mat)
Hello. my query is when I load my ECG_Save variable, it does open saved ecg signal along with figure as well. I don't understand...
3 years 前 | 1 个回答 | 0
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how can set clock parameters ?
Hi , I am designing ADC for which I am giving clock signal, but I am curious about the parameter of clock signal that how can I ...
5 years 前 | 0 个回答 | 0
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how can delay give in nano or pico seconds ?
Hi. I am giving delay to clock in mili, nano, pico seconds. Actually the clock timing value is let say 0.02 , if I attach variab...
5 years 前 | 0 个回答 | 0
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How to design 9-bit UP/DN counter in simulink ?
Hi, I want to design 9-bit UP/DN counter in simulink by using DFF. so that when input signal is logic '1' the counter count UP(9...
5 years 前 | 0 个回答 | 0
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why condition become true in if/esle ?
Hi, the below simple code is making trouble that : here Vxp and Vxn both are same value(32.000); so the difference must be 0 but...
6 years 前 | 2 个回答 | 0
2
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How can set variable-size signal with a nondiscrete sample time ?
Hi. I am facing some variable-size signal error. here in the (fig 1)attached file when I connect control input2 of switch2 with...
6 years 前 | 0 个回答 | 0
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How can convert variable-size signal ?
Hi, I am getting this error in simulink. can anybody help how can be removed this error ? I only get this error when I attach sw...
6 years 前 | 0 个回答 | 0
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two value difference is not complete 0. how can make it complete 0?
Hi, I am using *eq* function to see the difference but when i get these two values it's not giving right answer. fo example : wh...
6 years 前 | 1 个回答 | 0
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How can be delay clock forward and backward in simulink ?
Hi, I see in simulink the delay block only produce delay backward either *variable time delay* block or simple *unit delay* bloc...
6 years 前 | 0 个回答 | 0
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How can control enable sybsytem ?
Hi, In my attached deign the trigger subsystem always in trigger position. I want when the pulse block generates two output [y1,...
6 years 前 | 0 个回答 | 0
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How can input pulse signal be converted into vector ?
Hi, I am giving delay on clock by using *delayseq* function. As delayseq work on vectors but my input clock is either 1 or 0. so...
6 years 前 | 0 个回答 | 0
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how pulse generation can be integrated with trigger block ?
Hi, I generated pulse by using below code and now I want to trigger my sampler on every rising edge but the trigger subsystem is...
6 years 前 | 0 个回答 | 0
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How can adjust the delay ?
Hi. I am adjusting delay backward by using " *variable time delay*" block in simulink but its only forward the delay not backwar...
6 years 前 | 1 个回答 | 0
1
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How we can give Delay in a clock ?
Hi. I am using *"Delayseq"* function in MATLAB function block using simulink. But it doesn't provide delay in a clock. I cannot...
6 years 前 | 1 个回答 | 0
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How can Phased Array System Toolbox be added in MATLAB ?
Hi. I am working on delay in MATLAB and when I use *'delayseq'* function then error apperas that: *'delayseq' requires Phased...
6 years 前 | 1 个回答 | 0
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Adjust the delay in the clock
Hi. I am designing delay control logic design in simulink. how can delay be controlled ? I attached a snap in which clock2 and c...
6 years 前 | 0 个回答 | 0
0
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How can introduce Delay in Ideal Clock Pulse ?
Hi. I am working in simulink model design. I want to introduce some delay on clock without using ideal delay block. because the...
6 years 前 | 1 个回答 | 0
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how can design Quantifier through up/down counter?
Hi. I am designing quantifier through up/down counter but I am not getting one point here if someone could help in the following...
6 years 前 | 0 个回答 | 0
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How can I convert signed/unsigned Integer into binary converter in simulink ?
Hi, I am using integer to bit converter in simulink with my ADC sampler value . but it shows an error that *" Error in port ...
6 years 前 | 0 个回答 | 0
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how can I convert negative signed floating values into binary ?
Hi. I designed ADC in simulink and now I want to convert final scalar values into binary (digital form). how can I convert these...
6 years 前 | 0 个回答 | 0
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Parameter dimension error in simulink (variable sized mode to fixed size mode)
I am getting this below error (detailed in attached snap). could anyone help me to get rid from this error. the error appear whe...
6 years 前 | 0 个回答 | 0
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how we instantiate signal ports in Simulink ?
Hi. in the attached snap I am trying to use both block output signals to perform XOR operation. but the signal ports are not wel...
6 years 前 | 0 个回答 | 0
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how can I get binary output '0'or '1' according to sign of the input value ?
Hi. I have output of ADC which give sampled value either negative or positive. I want to decode these values in binary form '1...
6 years 前 | 1 个回答 | 0
1
个回答提问
Up/DN Counter in Simulink
I am using Simulink, In which I need to count Up and Down depending upon the input values. It should up when the input is high...
6 years 前 | 0 个回答 | 0