photo

JOAQUIN GARCIA ORDOÑEZ


Last seen: 12 months 前 |  自 2020 起处于活动状态

Followers: 0   Following: 0

统计学

  • First Review
  • Thankful Level 1

查看徽章

Feeds

排序方式:

提问


Processor and FPGA Synchronization in Coprocessing Mode
Hello everyone. I'm following this documentation to run an experiment that is hardware-in-the-loop: https://mathworks.com/help/...

3 years 前 | 1 个回答 | 0

1

个回答

提问


HDL Coder won't map LUT into BRAM
Hello everyone. I am trying to implement a machine learning algorithm into an FPGA using HDL Coder. I was recommended to use LU...

4 years 前 | 1 个回答 | 0

1

个回答

提问


How can I modify mapping options in HDL Workflow Advisor in Simulink?
Hi everyone. I am trying to implement a design on a FPGA using Simulink's HDL Workflow Advisor. The block that I am trying to i...

4 years 前 | 1 个回答 | 0

1

个回答