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Conv1 layer stalls in ZCU111 MathWorks DLHDL design
Hello, I am working on a custom Resnet18 CNN classifier reference design with a Xilinx ZCU111 RFSoC board using the MathWorks...
7 days 前 | 0 个回答 | 0
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Deep Learning HDL Workflow “Data size mismatch” after deployment – Possible device tree / AXI DMA configuration issue (ZCU111)
Hi, Thank you for the detailed explanation regarding possible causes of the “Data Mismatch” issue. I reviewed my design careful...
Deep Learning HDL Workflow “Data size mismatch” after deployment – Possible device tree / AXI DMA configuration issue (ZCU111)
Hi, Thank you for the detailed explanation regarding possible causes of the “Data Mismatch” issue. I reviewed my design careful...
24 days 前 | 0
提问
Deep Learning HDL Workflow “Data size mismatch” after deployment – Possible device tree / AXI DMA configuration issue (ZCU111)
Hello, I am working with Deep Learning HDL Toolbox on a custom reference design with the Xilinx ZCU111 RFSoC board. I am abl...
1 month 前 | 2 个回答 | 0
