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Udara De Silva


Florida International University

Last seen: 1 year 前 |  自 2022 起处于活动状态

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I am a Ph.D. Student in Electrical Engineering at Florida International University and a research assistant in RF-Analog and Digital Laboratory (RAND Lab) for Advanced Signal Processing Circuits. My research interests include ML accelerators, Full-Duplex RF systems, and real-time RF signal processing. More on my work can be found on my website https://udaradesilva.com

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SoCBlockset RFSoC template design fails in simulation
I have trouble simulating a RFSoC SoC Blockset design that worked previously. So I tried to create a fresh design from the simul...

2 years 前 | 0 个回答 | 0

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socModelCreator failed to generate design
I'm trying to use socModelCreator tool to generate a soc design for ZCU111 RFSoC board. Only changes I'm doing for the default v...

2 years 前 | 1 个回答 | 0

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Custom board ZCU104 fails to load in external mode
I am trying to get my Xilinx ZCU104 FPGA board to work with SoC blockset for 3 months now. I had many issues getting the SD card...

3 years 前 | 1 个回答 | 0

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SoC Builder fails to deploy on Xilinx ZCU104 FPGA Board
I am trying to setup a custom FPGA board with SoC Builder. I'm following this example: https://www.mathworks.com/help/supportpk...

3 years 前 | 1 个回答 | 0

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已回答
call different matlab function in for loop (SIMULINK)
Hi Johannes, You can use Matlab 'run' command to do this as shown below: if (0 <= s)&& (s<= R_kpi/2) beta = getBeta_1(s)...

3 years 前 | 0

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Adding Xilinx ZCU104 board to SoC Blockset
I have been trying to add Xilinx ZCU104 board to SoC blockset for several days now. Below is the tutorial I'm following: https:...

3 years 前 | 1 个回答 | 0

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