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Shashi TG


自 2016 起处于活动状态

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Problem with AXI stream interface in IP Integrator for Xilinx System generator IP cores
Hello there, I have system generator model which I have exported as an IP core to Vivado IP integrator. I have the AXI stream...

7 years 前 | 0 个回答 | 0

0

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已回答
Garbage values when storing the data into .dat file
Hi thanks for reply. It throws me following error: <</matlabcentral/answers/uploaded_files/70897/mat.PNG>>

8 years 前 | 0

提问


Garbage values when storing the data into .dat file
Hello there, I have a 3D array having data type float. When i store this array into a _.txt or .mat_ file and then open it, it ...

8 years 前 | 3 个回答 | 0

3

个回答

提问


Axi stream interface in Xilinx system generator
Hello there, I am trying to implement the AXI stream interface to an image negative operation in system generator. I want to v...

8 years 前 | 0 个回答 | 0

0

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提问


Xilinx system generator Hardware co-simulation taking more time on FPGA
Hi there, I have a Xilinx system generator design which takes around 4 mins to run on a host PC. But when i do hardware cosim...

8 years 前 | 1 个回答 | 0

1

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提问


Ragarding the custom IP core generation using xilinx system generator
Hi there, I have designed an up counter (counts from 0 to 10) using the system generator design flow. I exported the design ...

8 years 前 | 0 个回答 | 0

0

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Exporting Xilinx system generator design as IP catalog
Hi there, Can any type of xilinx system generator design be exported as an IP core to IP integrator? Or are there any conside...

8 years 前 | 1 个回答 | 0

1

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提问


Random values output from the IP core
Hi all, I have an up counter (0-10) IP core generated from the Xilinx system generator. when I write an app in SDK and run t...

8 years 前 | 1 个回答 | 0

1

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提问


No output for complex systen generator IP cores
Hello there, I am able to successfully generate IP cores for simple designs using IP integrator and get the output in SDK. But...

8 years 前 | 0 个回答 | 0

0

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提问


How to use AXI stream interfaces in xilinx system generator?
HI there, I want know if AXI stream interfaces can be used in xilinx system generator model for a single input port? If yes, th...

8 years 前 | 1 个回答 | 0

1

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提问


How can i perform imfreehand() operation in simulink?
Hi all, I need to draw a freehand ROI using the Simulink environment (equivalent to _imfreehand()_). How can I do that?

8 years 前 | 0 个回答 | 0

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提问


Where can i get the following zip file ?
hdlcoderrecon_xsg_files_8a.zip

8 years 前 | 0 个回答 | 0

0

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提问


why there is an error while running the matlab documentation for HDL coder.?
I m compiling the documentation for HDL coder:"Image Reconstruction Using the MATLAB Function Block" . When i compile the entire...

8 years 前 | 0 个回答 | 0

0

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How to find sum of all pixel value of ROI in a grayscale image?
I am trying to draw a ROI of a grayscale image using imfreehand. After drawing this, I want to count all the intensity levels co...

8 years 前 | 2 个回答 | 0

2

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