HDL Coder™ enables implementation of Simulink® models and MATLAB® algorithms onto Xilinx® development boards for fast prototyping on hardware using the Xilinx FPGA turnkey support package. The workflow advisor in HDL Coder helps you to select the FPGA board, map your algorithm I/O to onboard interface, generate HDL code, and synthesize the generated code. HDL Coder also provides integration with Xilinx ISE to synthesize the generated code into bitstream that you can directly download on to the FPGA on Xilinx Development boards for rapid prototyping.
To help you analyze synthesis timing report, HDL Workflow Advisor can also back annotate the Simulink model with critical path timing.
See the hardware support package system requirements table for current and prior version, release, and platform availability.
View enhancements and bug fixes in release notes.