Performance

Improve simulation speed, increase accuracy, reduce data loss

Improve the speed, accuracy, and reduce data loss in algorithm code generated for ARM^® Cortex^®-A processors.

Model Settings

Hardware Implementation Pane: ARM Cortex-A9 Hardware Boards and QEMU

Topics

Supported CMSIS Library Functions for ARM Cortex-A Processors
Supported CMSIS library functions.
Supported Ne10 Library Functions for ARM Cortex-A Processors
Supported Ne10 library functions.
Host-Target Communication with External Mode Simulation
Tune parameters and monitor signals through the communication channel between development computer and target hardware.
External Mode Simulation by Using XCP Communication
Run external mode simulations that use an XCP communication channel.
External Mode Simulation with TCP/IP
Run external mode simulations that use a TCP/IP or serial communication channel.
Verify Numerical Accuracy Using PIL
Verify numerical accuracy using Processor-in-the-Loop (PIL) simulation.
Optimize Code for ARM Cortex-A Processors
Use Ne10 Code Replacement Library for ARM Cortex-A Processors.
Generate SIMD Code from Simulink Blocks for ARM Platforms
Improve the execution speed of the generated code using ARM Neon technology.
Generate SIMD Code from MATLAB Functions for ARM Platforms
Improve the execution speed of the generated code using ARM Neon technology.

Featured Examples

Real-Time Code Execution Profiling

Profile the real-time execution of generated code running as an executable on an ARM® Cortex®-A (QEMU) processor emulator.

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Processor-in-the-Loop Verification of MATLAB Functions

Use Embedded Coder® Support Package for ARM® Cortex®-A Processors for processor-in-the-loop (PIL) verification of MATLAB® functions on an ARM Cortex-A9 (QEMU) emulator.

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Processor-in-the-Loop Verification of Simulink Models

Use Embedded Coder® Support Package for ARM® Cortex®-A Processors to verify code using PIL simulation.

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Generate Optimized Code for Math Functions Using ARM Cortex-A CMSIS CRL

Use the ARM Cortex-A CMSIS code replacement library (CRL) to generate optimized code for math functions on ARM® Cortex-A® hardware targets. The example walks you through the process of code generation, deployment of the generated code on the ARM Cortex-A hardware targets, and the process of measuring the performance gain achieved by using ARM Cortex-A CMSIS CRL on the selected ARM Cortex-A hardware target.

Since R2024a
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New

Generate and Deploy Optimized Code for Interpolated FIR Filter on Raspberry Pi using ARM Cortex-A CMSIS CRL

Generate and deploy optimized code for an interpolated finite impulse response filter (IFIR) on a Raspberry Pi® target using ARM Cortex-A® CMSIS code replacement library (CRL) in Simulink(R). Additionally, this example uses SIL/PIL (software in loop/processor in loop) manager application to conduct simulations, which collect the execution time metrics of the generated code and compare the execution time of the generated code with that of the plain C code.

Since R2024b
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