Prototype Deep Learning Networks on FPGA
R2026bCreate a bitstream containing user programming and download it to Intel® FPGA and SoC devices
The SoC Blockset™ Support Package for AMD FPGA and SoC Devices enables you to deploy your custom series deep learning network, and custom deep learning processor IP on the hardware.
Functions
| Configure deployment workflow for deep learning neural network |
| Configure interface to target board for workflow deployment |
Topics
- Supported Networks, Boards, and Tools (Deep Learning HDL Toolbox)
Pretrained deep learning networks and network layers for which code can be generated by Deep Learning HDL Toolbox™.
Featured Examples
Get Started with Deep Learning FPGA Deployment on Intel Arria 10 SoC
Create, compile, and deploy a dlhdl.Workflow object that has a handwritten character detection series network object by using the HDL Coder™ Support Package for Intel® FPGA and SoC Devices. Use MATLAB® to retrieve the prediction results from the target device.
