建模
R2026b准备模型以部署到硬件，添加模块以支持硬件
HDL Coder™ Support Package for Intel® FPGA and SoC Devices 提供 Simulink® 模块库和特定于 Altera® SoC 器件的模型配置。
模块
 | AXI4 Read | Read data from IP core on target hardware through the AXI4-Lite interface |
 | AXI4 Write | Write data to IP core on the target hardware through AXI4-Lite interface |
 | Linux Task | Spawn task function as separate Linux thread |
 | UDP Receive | Receive UDP data |
 | UDP Send | Send UDP message |
函数
alterasoclib | Open the Simulink Library Browser to the HDL Coder Support Package for Intel FPGA and SoC Devices block library |
主题
- Embedded Target Features for Altera SoC Platform
Supported features for Altera SoC platform.
App
| 在硬件板上运行 - Altera SoC 器件 | Build, deploy, and run models on connected hardware boards |
精选示例
Parameter Tuning with External Mode Simulation
Run a Simulink® model in external mode on the ARM® Cortex®-A processor in an Intel® SoC device.
Get Started With Code Generation Using HDL Coder Support Package for Intel FPGA and SoC Devices
Use HDL Coder® Support Package for Intel® FPGA and SoC Devices to run a Simulink® model on an Intel SoC device.
