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Force reset

Specify whether the test bench forces reset input signals

Model Configuration Pane: Test Bench


Specify whether the test bench forces reset input signals.


This option is disabled if you select the entire model. Select the DUT instead for Generate HDL for setting.


On (default) | Off

The test bench forces the reset input signals.


A user-defined external source forces the reset input signals.


To set this property, use hdlset_param or makehdltb. To view the property value, use hdlget_param.

For example, you can specify this parameter for the symmetric_fir subsystem inside the sfir_fixed model using either of these methods.

  • Pass the property as an argument to the makehdltb function.

    makehdltb('sfir_fixed/symmetric_fir', ... 
                'ForceReset', 'off')
  • When you use hdlset_param, you can set the parameter on the model and then generate HDL code using makehdltb.

    hdlset_param('sfir_fixed', 'ForceReset', 'off')

If you select this option, you can use the Hold time option to control the timing of a reset.

Recommended Settings

No recommendations.

Programmatic Use

Parameter: ForceReset
Type: character vector
Value: 'on' | 'off'
Default: 'on'

Version History

Introduced in R2012a