HDL Coder Checks
Use the HDL Coder checks in the Model Advisor or the HDL Code Advisor to verify and update your Simulink® model or subsystem and ensure they are compatible with HDL code generation. Running these checks generates a report that identifies suboptimal settings and suggests improvements in model configuration settings for better HDL compatibility.
To learn about:
HDL Code Advisor, see Check HDL Compatibility of Simulink Model Using HDL Code Advisor.
Model Advisor, see Run Model Advisor Checks for HDL Coder.
The five types of HDL Coder checks are:
Checks for blocks and block settings: Use these checks to verify whether blocks in your model are supported for HDL code generation, and whether the supported blocks have HDL-compatible settings. These checks include whether the blocks in your model have a continuous sample time and whether Stateflow® charts and MATLAB Function blocks have HDL-compatible settings.
Industry standard checks: Use these checks to verify whether your Simulink model conforms to industry-standard rules that recommend using certain HDL coding guidelines. When generating code, HDL Coder™ displays an HDL coding standard report that shows how well the generated code adheres to the industry-standard guidelines. For more information, see HDL Coding Standards.
Model configuration checks: Use these checks to ensure your model is compatible with HDL code generation. These checks that verify whether model parameters are HDL-compatible, whether your design contains algebraic loops, and so on.
Native Floating Point checks: Use these checks to verify whether the blocks in your Simulink model are compatible for HDL code generation in native floating-point. The checks include whether the model uses single data types, and so on. Native floating-point support in HDL Coder generates target-independent HDL code from your single-precision floating-point model. For more information, see Generate Target-Independent HDL Code with Native Floating-Point.
Checks for ports and subsystems: Use these checks to verify whether the ports and subsystems in your model have settings that are compatible for HDL code generation. The checks include whether you have a valid top-level DUT subsystem and whether you have specified an initial condition for Enabled Subsystem and Triggered Subsystem blocks.
To see all the HDL Coder checks, see Model Compatibility Checks.
