Get Started with Filter Design HDL Coder
Note
The Filter Design HDL Coder™ product will be discontinued in a future release. Instead, you can model hardware behavior and generate HDL code by using the DSP HDL IP Designer (DSP HDL Toolbox) app, or the DSP HDL Toolbox™ System objects or blocks. The app, objects, and blocks provide algorithms with hardware-friendly control signals and architecture options. To generate HDL code from these algorithms, you must also have the HDL Coder™ product.
For an example that uses the dsphdl.BiquadFilter
(DSP HDL Toolbox) object and generates code using
HDL Coder tools, see Generate HDL Code for IIR Filter (DSP HDL Toolbox). For
Simulink® tutorials, see Get Started with DSP HDL Toolbox (DSP HDL Toolbox). For supported algorithms, see HDL-Optimized Filters and Transforms (DSP HDL Toolbox).
Topics
- Basic FIR Filter
Design a basic quantized discrete-time FIR filter, generate VHDL code for the filter, and verify the VHDL code with a generated test bench.
- Optimized FIR Filter
Design an optimized FIR filter, generate Verilog code for the filter, and verify the Verilog code with a generated test bench.
- IIR Filter
Design an IIR filter, generate VHDL code for the filter, and verify the VHDL code with a generated test bench.