Set Simulink Model Configuration Parameters

When you create a Simulink^® model that includes one or more HDL Verifier™ Cosimulation blocks, you might want to adjust certain Simulink parameter settings to best meet the needs of HDL modeling. For example, you might want to adjust the value of the Stop time parameter in the Solver pane of the Model Configuration Parameters dialog box.

You can adjust the parameters individually or you can use DSP System Toolbox™ Simulink model templates to automatically configure the Simulink environment with the recommended settings for digital signal processing modeling.

The default settings for SaveTime and SaveOutput improve simulation performance.

For more information on DSP System Toolbox Simulink model templates, see the DSP System Toolbox documentation.

Determine Available Socket Port Number

To determine an available socket number enter this in a MATLAB^® command prompt:

getAvailableSocketPort

Check Connection Status

To check the connection status, on the Modeling tab, in the Compile section, click Update Model. If you have an error in the connection, Simulink will notify you.

The MATLAB command pingHdlSim can also be used to check the connection status. If a -1 is returned, then there is no connection with the HDL simulator.

Run and Test Cosimulation Model

In general, the last stage of cosimulation is to run and test your model. There are some steps you must be aware of when changing your model during or between cosimulation sessions. You can run the cosimulation in one of three ways:

 tclcmd = { ['cd ',unixprojdir],...
            ['exec xmvlog -64bit -linedebug ',unixsrcfile1],...
             'exec xmelab -64bit -access +wc work.inverter_vl',...
             'hdlsimulink -gui work.inverter_vl'
          };

nclaunch('tclstart',tclcmd,'runmode','CLI');

tclcmd = {'vlib work',...
    'vlog addone_vlog.v add_vlog.v top_frame.v',...
    'vsimulink top =socket 5002'};

vsim('tclstart',tclcmd,'runmode','CLI');

nclaunch('tclstart',manchestercmds,'runmode','Batch')

>> vsim('tclstart',manchestercmds,'runmode','Batch')

Set Parameters from a Tcl Script

You can create a Tcl script that lists the Tcl commands you want to execute on the HDL simulator, either pre- or post-simulation.

Tcl Scripts for ModelSim Users

You can create a ModelSim DO file that lists Tcl commands and then specify that file with the ModelSim do command as follows:

do mycosimstartup.do

or

do mycosimcleanup.do

You can include the quit -f command in an after-simulation Tcl command or DO file to force ModelSim to shut down at the end of a cosimulation session. Specify all after-simulation Tcl commands in a single cosimulation block, and place quit at the end of the command or DO file.

Except for quit, the command or DO file that you specify cannot include commands that load a ModelSim project or modify simulator state. For example, they cannot include commands such as start, stop, or restart.

Tcl Scripts for Xcelium™ Users

You can create an HDL simulator Tcl script that lists Tcl commands, and then specify that file with the HDL simulator source command as follows:

source mycosimstartup.script_extension

or

source mycosimcleanup.script_extension

You can include the exit command in an after-simulation Tcl script to force the HDL simulator to shut down at the end of a cosimulation session. Specify all after-simulation Tcl commands in a single cosimulation block and place exit at the end of the command or Tcl script.

Except for exit, the command or Tcl script that you specify cannot include commands that load an HDL simulator project or modify simulator state. For example, they cannot include commands such as run, stop, or reset.

This example shows a Tcl script when the -gui argument was used with hdlsimmatlab or hdlsimulink:

after 1000 {xmsim -submit exit}

This example shows a Tcl exit script to use when the -tcl argument was used with hdlsimmatlab or hdlsimulink:

after 1000 {exit}

Avoid Race Conditions in HDL Simulation with Testbench Cosimulation and the HDL Verifier HDL Cosimulation Block

In the HDL simulator, you cannot control the order in which clock signals (rising-edge or falling-edge) defined in the HDL Cosimulation block are applied, relative to the data inputs driven by these clocks. If you are careful to verify the relationship between the data and active edges of the clock, you can avoid race conditions that could create differing cosimulation results. See Race Conditions in HDL Simulators.