准备实时模型
准备将 Simscape 模型用于实时仿真时，需要以迭代方式平衡性能和保真度，以便以对目标机而言足够小的成本和时间步生成准确的结果。首先从模型中获取参考结果。当您的模型能够使用定步长求解器产生与参考结果相当的准确结果时，即可尝试将该模型部署到实时目标机。根据需要执行以下步骤，以平衡性能和保真度：
使用理想模块或系统级模块以及理想参数化代替更复杂的模块和参数化。
删除快速动态特性的来源。
删除数值刚度的来源。
删除过零点的来源。
使用分区求解器。
对模型进行分区。
最小化求解器迭代次数。
减少 FPGA 部署的模式来源。
要分析快速动态特性和数值刚度的求解器性能，请使用求解器探查工具。当您准备转换为定步长、固定成本时，请使用 simscape.getLocalSolverFixedCostInfo 函数来确定要执行多少次非线性迭代。
工具
| 求解器探查工具 | Identify solver performance bottlenecks |
函数
simscape.getLocalSolverFixedCostInfo | Determine iteration requirement when transitioning to fixed cost (自 R2021b 起) |
主题
定步长、固定成本设置
- Examine Model Dynamics Using Solver Profiler
Identify factors affecting model simulation using the Solver Profiler. - Solvers for Real-Time Simulation
The fixed-step solver, step size, and number of iterations that you specify affect how your Simscape™ model simulates in real time. - Identify and Resolve System Stiffness in Simscape Models
Analyze the effect of particular block variables on overall system stiffness of a Simscape network. - Define Step Size and Number of Nonlinear Iterations for Simscape Real-Time Simulation
Determine the step size and number of nonlinear iterations for fixed-step, fixed-cost simulation. - Estimate Computation Costs
Determine if your Simscape model is likely to cause an overrun when you simulate it on your real-time target machine by estimating computational costs.
性能优化
- Reduce Zero Crossings
Eliminate components that cause zero crossings to increase the minimal step-size for fixed-step simulation and to make your Simscape model real-time capable. - Increase Simulation Speed Using the Partitioning Solver
Improve performance by using the Simscape Partitioning solver to convert a large system of equations into several smaller systems of equations that are easier to solve.
FPGA 部署
- Get Started with Simscape Hardware-in-the-Loop Workflow (HDL Coder)
Simscape Hardware-in-the-Loop workflow modeling guidelines and restrictions. - Simscape Language Support for FPGA HIL Deployment (HDL Coder)
Simscape language support in Simscape Hardware-in-the-Loop Workflow. - Modeling Guidelines for Simscape Subsystem Replacement (HDL Coder)
Simscape modeling best practices for replacing Simscape subsystem with state-space algorithm. - Replace Piecewise-Constant Resistor with Switched Linear Components (HDL Coder)
Convert a Simscape model with nonlinear component into a switched linear model. - Estimate Achievable Target Frequency Without Running Synthesis (HDL Coder)
Estimate the optimal frequency that you want your Simscape models to achieve on FPGA without running synthesis. - Modeling Techniques for Simscape Converters for FPGA HIL Deployment (HDL Coder)
Model your power electronic converter by using hardware-in-the-loop (HIL) simulation in a real-time target machine.
通用平台
- Requirements for Using Alternative Platforms
Follow the recommendations for minimum hardware, software, and compiler specifications to deploy your Simscape model for hardware-in-the-loop (HIL) simulation using a custom standalone application. - Embedded and Generic Real-Time Resources
Simulink® Coder™ and Embedded Coder® use system target files (STFs) to generate code for interfacing with specific real-time operating systems.
精选示例
Configuring an EV Simulation for Multirate HIL
An electric vehicle model suitable for multirate Hardware-In-the-Loop (HIL) deployment. The example uses the Simscape™ Network Couplers Library to split the model into separate Simulink® subsystems that can be deployed at different sample rates. This allows you to run parts of the system (for example thermal components) with a slower sample time thereby reducing overall computational cost.
Partition a Model By Using a Network Coupler Block
Partition a Simscape model for parallel processing on real-time processors.
