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socModelBuilder

Build, load, and execute SoC model on SoC and FPGA boards

Since R2023a

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Description

The socModelBuilder object controls and runs the steps for building and executing an SoC model on an SoC or FPGA board. Use this object to load existing binaries onto the hardware board.

Creation

Syntax

obj = socModelBuilder(modelName)
obj = socModelBuilder(modelName,Name=Value)
obj = socModelBuilder

Description

obj = socModelBuilder(modelName) creates an object that you can use to build the model with the name modelName.

example

obj = socModelBuilder(modelName,Name=Value) sets properties using one or more name-value arguments.

obj = socModelBuilder sets properties to their default value.

Input Arguments

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Model name, specified as a character vector or string scalar. You must specify this input as a valid Simulink® model name. To update the model name after creating the object, use the ModelName property.

Example: 'soc_rfsoc_datacapture'

Data Types: char | string

Properties

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Model name, specified as a character vector or string scalar. Use this property to update the model name that you specify in the modelName input argument.

Example: 'soc_rfsoc_datacapture'

Data Types: char | string

Folder for the generated project files, specified as a character vector or string scalar. The buildModel function places all the generated files, including reports, executables, and bitstream, in this folder.

Example: 'soc_prj'

Data Types: char | string

Model part to build, specified as one of these values.

  • 'Processor and FPGA' — Build the processor and FPGA models in your top model.

  • 'Processor only' — Build only the processor model in your top model.

  • 'FPGA only' — Build only the FPGA model in your top model.

Example: 'Processor and FPGA'

Data Types: char | string

Option to run the generated software model in external mode, specified as one of these values.

Example: false

Data Types: logical

Option to run the FPGA build process externally in a Windows® command or Linux® shell, specified as one of these values.

  • true — Run the FPGA build process parallel to MATLAB® in an external shell.

  • false — Keep MATLAB busy until the FPGA build process completes.

Example: true

Data Types: logical

Object Functions

buildModelBuild SoC model
loadBinariesLoad existing binaries onto hardware board

Examples

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Use MATLAB commands to build an SoC model by creating and configuring the socModelBuilder object. Load the binaries in the specified project folder onto the Xilinx® Zynq® UltraScale+™ RFSoC ZCU111 Evaluation Kit.

Set the synthesis tool path to point to an installed Vivado® Design Suite. When you execute this command, use your own Xilinx Vivado installation path.

hdlsetuptoolpath('ToolName','Xilinx Vivado', ...
  'ToolPath','C:\Xilinx\Vivado\2022.1\bin\vivado.bat');

Create an socModelBuilder object for the soc_rfsoc_datacapture SoC model. To run the generated software model in external mode, set ExternalMode to true.

obj = socModelBuilder('soc_rfsoc_datacapture',ExternalMode=true)
obj = 

  socModelBuilder with properties:

               ModelName: 'soc_rfsoc_datacapture'
           ProjectFolder: 'soc_prj'
               BuildType: 'Processor and FPGA'
            ExternalMode: 1
    RunExternalFPGABuild: 1

Change the project folder to G:\R2023a\myProject.

obj.ProjectFolder = 'G:\R2023a\myProject'
obj = 

  socModelBuilder with properties:

               ModelName: 'soc_rfsoc_datacapture'
           ProjectFolder: 'G:\R2023a\myProject'
               BuildType: 'Processor and FPGA'
            ExternalMode: 1
    RunExternalFPGABuild: 1

Build the model.

buildModel(obj);

Load the binaries in the G:\R2023a\myProject project folder to the last connected hardware board.

loadBinaries(obj);

Load the binaries in the G:\R2023a\myProject project folder onto the Xilinx Zynq UltraScale+ RFSoC ZCU111 Evaluation Kit.

hw = socHardwareBoard('Xilinx Zynq UltraScale+ RFSoC ZCU111 Evaluation Kit');
loadBinaries(obj,hw);

Version History

Introduced in R2023a

See Also