loadBinaries

Set the synthesis tool path to point to an installed Vivado^® Design Suite. When you execute this command, use your own Xilinx^® Vivado installation path.

hdlsetuptoolpath('ToolName','Xilinx Vivado','ToolPath', ...
 'C:\Xilinx\Vivado\2022.1\bin\vivado.bat');

Create an socModelBuilder object for the soc_hwsw_top SoC model.

obj = socModelBuilder('soc_hwsw_top')

obj = 

  socModelBuilder with properties:

               ModelName: 'soc_hwsw_top'
           ProjectFolder: 'soc_prj'
               BuildType: 'Processor and FPGA'
            ExternalMode: 0
    RunExternalFPGABuild: 1

Change the project folder to G:\R2023a\myProject.

obj.ProjectFolder = 'G:\R2023a\myProject'

obj = 

  socModelBuilder with properties:

               ModelName: 'soc_hwsw_top'
           ProjectFolder: 'G:\R2023a\myProject'
               BuildType: 'Processor and FPGA'
            ExternalMode: 0
    RunExternalFPGABuild: 1

Load the binaries in the G:\R2023a\myProject project folder to the most recently connected hardware board.

loadBinaries(obj);

Load the binaries in the G:\R2023a\myProject project folder onto the ZedBoard.

hw = socHardwareBoard('ZedBoard');
loadBinaries(obj,hw);