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CCSDS LDPC Decoder

Decode LDPC code according to CCSDS standard

Since R2022b

  • CCSDS LDPC Decoder block

Libraries:
Wireless HDL Toolbox / Error Detection and Correction

Description

The CCSDS LPDC Decoder block implements a low-density parity-check (LDPC) decoder using a layered belief propagation algorithm with min-sum approximation for decoding LDPC codes according to the Consultative Committee for Space Data Systems (CCSDS) standard [1]. The block accepts log-likelihood ratio (LLR) values, a stream of control signals, a block length, and a code rate as inputs. The block outputs decoded bits, a stream of control signals, and a signal that indicates when the block is ready to accept new inputs.

The block supports scalar inputs and vector inputs of size 8. The block supports early termination to improve decoding performance and convergence speeds at high signal-to-noise ratio (SNR) conditions.

The block provides an architecture suitable for HDL code generation and hardware deployment. You can use this block in a CCSDS receiver for satellite communication.

Examples

Ports

Input

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LLR values, specified as a scalar or an eight-element column vector.

For HDL code generation, specify this value in signed fixed-point format. The input word length must be an integer in the range [4, 16] and the fractional length must be in the range [0, 15].

Data Types: int8 | int16 | signed fixed point

Control signals accompanying the sample stream, specified as a samplecontrol bus. The bus includes the start, end, and valid control signals, which indicate the boundaries of the frame and the validity of the samples.

  • start — Indicates the start of the input frame

  • end — Indicates the end of the input frame

  • valid — Indicates that the data on the input data port is valid

For more details, see Sample Control Bus.

Data Types: bus

Code rate index, specified as 0, 1, or 2. You must specify this value in the fixdt(0,2,0) format. Each code rate index value represents a specific code rate, as this table shows.

codeRateIdx ValueCode Rate
0 1/2
12/3
24/5

Dependencies

To enable this port, set the Configuration type parameter to AR4JA LDPC.

Data Types: fixdt(0,2,0)

Block length index, specified as 0, 1, or 2. You must specify this value in the fixdt(0,2,0) format.

The block length varies with the specified block length index. The input block length must be a multiple of 8. This table shows the block length index values and their corresponding block lengths.

blkLenIdx ValueBlock Length
0 1024
14096
216384

Dependencies

To enable this port, set the Configuration type parameter to AR4JA LDPC.

Data Types: fixdt(0,2,0)

Number of iterations, specified as an unsigned integer in the range [1, 63].

If you specify an iter value greater than 63 or less than 1, the block overrides your specification and sets the iter value to 8 before it performs decoding.

Dependencies

To enable this port, set the Decoding termination criteria parameter to Max and the Source for number of iterations parameter to Input port.

Data Types: uint8

Output

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Decoded bits, returned as a Boolean scalar or an eight-element column vector of Boolean values.

Data Types: Boolean

Control signals accompanying the sample stream, returned as a samplecontrol bus. The bus includes the start, end, and valid control signals, which indicate the boundaries of the frame and the validity of the samples.

  • start — Indicates the start of the output frame

  • end — Indicates the end of the output frame

  • valid — Indicates that the data on the output data port is valid

For more details, see Sample Control Bus.

Data Types: bus

Block ready indicator, returned as a Boolean scalar.

The block sets this signal to 1 when the block is ready to accept the start of the next frame. If the block receives an input ctrl.start signal while nextFrame is 0, the block discards the frame in progress and begins processing the new data.

Data Types: Boolean

Actual number of iterations the block takes to decode the output, returned as a positive scalar.

Dependencies

To enable this port, set the Decoding termination criteria parameter to Early.

Data Types: uint8

Parity check status indicator, returned as a Boolean scalar. The port indicates the status of the parity check after the decoding operation.

  • 0 — Indicates that the parity check failed

  • 1 — Indicates that the parity check passed

Dependencies

To enable this port, select the Enable parity check output port parameter.

Data Types: Boolean

Parameters

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Select the configuration type. For more information about the supported configurations, see [1].

Select the decoding termination criteria.

  • Max — Terminate decoding when the block reaches the number of iterations specified in the block mask or the iter input port.

  • Early — Terminate decoding when the block completes all of the parity checks or when the block reaches the maximum number of iterations specified in the block mask.

Select the source for specifying the number of iterations.

You can set the number of iterations by using an input port or a parameter.

  • Property — Select this option to enable the Number of iterations parameter.

  • Input port — Select this option to enable the iter port.

Specify the number of decoding iterations.

Dependencies

To enable this parameter, set the Decoding termination criteria parameter to Max and the Source for number of iterations parameter to Property.

Specify the maximum number of decoding iterations.

Dependencies

To enable this parameter, set the Decoding termination criteria parameter to Early and set the Source for number of iterations parameter to Property.

Select this parameter to enable the parityCheck output port. Use this output port to view the status of the parity check.

Algorithms

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This figure shows the architecture block diagram of the CCSDS LDPC Decoder block. The Controller block controls the layer and iteration count of the decoding process. The Variable node RAM block stores the variable node (VN) messages, and the Check node RAM block stores the check node (CN) messages. The Functional Unit block calculates the VN messages and CN messages based on the layered belief propagation and either the normalized min-sum approximation algorithm or the min-sum approximation algorithm. The Termination/Parity check status block calculates the parity checks and provides the parity check status after each iteration. For more information about the decoding algorithms, see the following sections.

CCSDS LDPC block architecture

References

[1] TM Synchronization and Channel Coding. Recommendation for Space Data System Standards. CCSDS 131.0-B-3. Blue Book. Issue 3. Washington, D.C.: CCSDS, September 2017.

[2] TM Synchronization and Channel Coding. Summary of Concept and Rationale CCSDS 130.1-G-3. Green Book. Issue 3, June 2020.

[3] Stephen B. Wicker. Error Control Systems for Digital Communication and Storage. Prentice Hall, 1995.

[4] Gallager, R. “Low-Density Parity-Check Codes.” IEEE Transactions on Information Theory 8, no. 1 (January 1962): 21–28. https://doi.org/10.1109/TIT.1962.1057683.

[5] Hocevar, D.E. “A Reduced Complexity Decoder Architecture via Layered Decoding of LDPC Codes.” In IEEE Workshop OnSignal Processing Systems, 2004. SIPS 2004., 107–12. Austin, Texas, USA: IEEE, 2004. https://doi.org/10.1109/SIPS.2004.1363033.

Extended Capabilities

Version History

Introduced in R2022b