HDL-Optimized System Design
These blocks implement hardware-friendly architectures and support HDL code generation when used with HDL Coder™. The blocks on this page also have streaming interfaces that process a single sample or a vector of samples at a time, hardware control signals, and options to select different hardware implementations of their algorithms.
Blocks
Block Coding
CCSDS RS Encoder | Encode message into RS codeword according to CCSDS standard (Since R2022a) |
CCSDS RS Decoder | Decode and recover message from RS codeword according to CCSDS standard (Since R2021b) |
CCSDS LDPC Decoder | Decode LDPC code according to CCSDS standard (Since R2022b) |
DVB-S2 BCH Decoder | Decode and recover message from BCH codeword according to DVB-S2 standard (Since R2022a) |
DVB-S2 LDPC Decoder | Decode LDPC code according to DVB-S2 standard (Since R2022a) |
NR LDPC Encoder | Perform LDPC encoding according to 5G NR standard (Since R2020a) |
NR LDPC Decoder | Decode LDPC code according to 5G NR standard (Since R2020a) |
NR Polar Encoder | Perform polar encoding according to 5G NR standard (Since R2020a) |
NR Polar Decoder | Perform polar decoding according to 5G NR standard (Since R2020a) |
WLAN LDPC Decoder | Decode LDPC code according to WLAN standard (Since R2021b) |
RS Encoder | Encode message to RS codeword (Since R2020b) |
RS Decoder | Decode and recover message from RS codeword (Since R2020a) |
LDPC Encoder | Encode quasi-cyclic low-density parity-check code (Since R2023a) |
LDPC Decoder | Decode quasi-cyclic low-density parity-check code (Since R2023b) |
Convolutional Coding
APP Decoder | Decode convolutionally-coded LLR values using MAP algorithm (Since R2021b) |
LTE Convolutional Encoder | Encode binary samples using tail-biting convolutional algorithm |
LTE Convolutional Decoder | Decode convolutional-encoded samples using Viterbi algorithm |
LTE Turbo Encoder | Encode binary samples using turbo algorithm |
LTE Turbo Decoder | Decode turbo-encoded samples |
Convolutional Encoder | Encode data bits using convolution coding — optimized for HDL code generation |
Puncturer | Punctures data according to puncture vector |
Depuncturer | Reverse puncturing scheme to prepare for decoding |
Viterbi Decoder | Decode convolutionally encoded data using Viterbi algorithm |
Cyclic Redundancy Check (CRC) Coding
LTE CRC Encoder | Generate checksum and append to input sample stream |
LTE CRC Decoder | Detect errors in input samples using checksum |
NR CRC Encoder | Generate CRC code bits and append them to input data (Since R2021a) |
NR CRC Decoder | Detect errors in input data using CRC (Since R2021a) |
Modulation
DVB-S2 Symbol Demodulator | Demodulate complex constellation symbol to set of LLR values or data bits according to DVB-S2 standard (Since R2021b) |
DVB-S2 Symbol Modulator | Modulate data bits to complex constellation symbols according to DVB-S2 standard (Since R2022b) |
LTE OFDM Modulator | Modulate LTE resource grid and return time-domain OFDM samples |
LTE OFDM Demodulator | Demodulate time-domain OFDM samples and return LTE resource grid |
LTE Symbol Modulator | Modulate data bits to complex LTE data symbols |
LTE Symbol Demodulator | Demodulate complex LTE data symbols to data bits or LLR values |
NR Symbol Modulator | Modulate data bits to complex NR data symbols |
NR Symbol Demodulator | Demodulate complex NR data symbols to data bits or LLR values |
FFT 1536 | Computes fast-fourier-transform (FFT) for LTE standard transmission bandwidth of 15 MHz |
OFDM Channel Estimator | Estimate channel using input data and reference subcarriers (Since R2020a) |
OFDM Equalizer | Equalize OFDM data using channel estimates (Since R2021a) |
OFDM Modulator | Modulate frequency-domain OFDM subcarriers to time-domain samples for custom communication protocols (Since R2020a) |
OFDM Demodulator | Demodulate time-domain OFDM samples and return subcarriers for custom communication protocols |
Symbol Demodulator | Demodulate complex constellation symbol to set of LLR values or data bits (Since R2022a) |
GMSK Modulator | Modulate data bits using Gaussian minimum shift keying (GMSK) method (Since R2024a) |
Utilities
LTE Gold Sequence Generator | Generate Gold sequence |
Featured Examples
Sample Rate Conversion for an LTE Receiver
Implement sample rate converter for LTE receiver front end.
HDL Code Generation for Filtered OFDM (F-OFDM) Transmitter
Filter symbols after IFFT to improve bandwidth while maintaining orthogonality.
HDL Implementation of Variable-Size FFT
Implement variable-size FFT by using single FFT core.
Accelerate BER Measurement for Wireless HDL LTE Turbo Decoder
Measure BER of LTE Turbo Decoder block using parsim to parallelize simulations across EbNo points.
HDL Implementation of AWGN Generator
Implement AWGN generator that is optimized for HDL code generation and hardware implementation.
HDL Interleaver and Deinterleaver
Design and implement interleaving and deinterleaving in communication systems.
HDL Implementation of Digital Predistorter
Implement Digital Predistorter that is optimized for HDL code generation and hardware implementation.
HDL Implementation of Digital Predistorter with LMS Coefficient Estimation
Implement DPD with LMS coefficients and pre-calculated coefficients optimized for HDL code generation.
DVB-S2 HDL LDPC Encoder
Implement DVB-S2 LDPC encoding using Simulink® blocks that are optimized for HDL code generation.
DVB-S2 HDL BCH Encoder
Implement DVB-S2 BCH encoder using Simulink® blocks that are optimized for HDL code generation.
WLAN HDL LDPC Encoder
Implement WLAN LDPC encoder using Simulink® blocks that are optimized for HDL code generation.
HDL Neural Network Design for Digital Predistorter
Use neural-network-based (NN-based) digital predistorter (DPD) to compensate effects of nonlinearities in power amplifier.
HDL Digital Automatic Gain Control for Single and Multicarrier Systems
Implement digital AGC for single-carrier and multicarrier systems using Simulink® blocks optimized for HDL code generation.
HDL Implementation of SISO Fading Channel
Use SISO fading channel to evaluate performance of wireless communication systems over Rayleigh and Rician fading channels.
Parallel Concatenation Using APP Decoder
Decode parallel concatenated convolution codes using APP Decoder block.
HDL Implementation of IQ Imbalance Estimation and Compensation
Implement IQ imbalance estimation and compensation on QAM/PSK modulated signals.
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