how to solve this error?

2022 5 10
1 个回答
更新时间：2022 5 10
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回答（1 个）

Kiran Kintali
Kiran Kintali 2022-5-10

0 个投票

Results from FPGA synthesis tool cannot be backannotated to model if they fall within Stateflow Block. This is a known limitation.
Can you reach out to customer support with your reproduction model?

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