how to solve this error?

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冲 陈
冲 陈 2022-5-10
回答： Kiran Kintali 2022-5-10

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Kiran Kintali
Kiran Kintali 2022-5-10
Results from FPGA synthesis tool cannot be backannotated to model if they fall within Stateflow Block. This is a known limitation.
Can you reach out to customer support with your reproduction model?

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