Represent std_logic_vector in Simulink
显示 更早的评论
Does SIMULINK support creation of typical HDL data types or only MATLAB types (e.g. UINT32, FI, etc.)? Some of the inputs to my system do not fall neatly into power-of-2 variable sizing and I would like to be able to create something equivalent to std_logic_vector (10 downto 0) in SIMULINK. Even if I have to somehow create the datatype from scratch, is this possible?
I want to be able to use this datatype and assign it to my ports as their datatype.
采纳的回答
Kiran Kintali
2023-9-7
编辑：Kiran Kintali
2023-9-8
HDL Coder supports fixed point data types with integer lengths ranging from 1 to 128 bits.
During the HDL code generation process, these map to the std_logic_vector type (typically used for arrays of std_logic variables and signals in VHDL).
Try HDL Code generation from some of example MATLAB Code and Simulink models foudn here..
You can browse through the code samples in the HDL Coder documentation to get an idea of the std_logic and std_logic_vector types generated.
y : OUT std_logic_vector(32 DOWNTO 0) -- sfix33_En20
2 个评论
Brad
2024-3-7
Kiran Kintali
2024-3-10
>128 or 129+ bit support is currently under development. Please stay tuned for an update on this topic in the next couple of weeks.
The only option currently available is to use the large data type say 1024bits into chunks of 128bits and use a vector format to propagate the data.
更多回答（0 个）
类别
在 帮助中心 和 File Exchange 中查找有关 HDL Code Generation 的更多信息
Community Treasure Hunt
Find the treasures in MATLAB Central and discover how the community can help you!
Start Hunting!
Translated by 
