Dynamic LUT in HDL coder

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Philipp
Philipp 2023-10-16
评论： Philipp 2024-4-9
I am in the process of implementing a nonlinear model of a Permanent Magnet Synchronous Motor (PMSM). To make this model functional, I require 2D lookup tables. The Simulink simulation was successful and yielded the expected results. For the next phase, I intend to implement the model on an FPGA, and I plan to use HDL-Coder to convert my model into VHDL code.
However, I have encountered an issue in the final step of the HDL-Coder process. I wish to implement the model dynamically, similar to the approach described here: https://de.mathworks.com/help/simulink/slref/prelookup-external-breakpoint-spec.html. Specifically, I aim to load different flux maps into the model as an input. The error message that occurs is as follows:
"Failed For the block 'uz_pmsm_model_nonlinear_new/uz_pmsm_model_nonlinear_new/pmsm/q_current_LUT1' Lookup table specification of breakpoints 2 must be set to 'Dialog' for HDL code generation.
Error using slhdlcoder.HDLCoder/reporterrors
For the block 'uz_pmsm_model_nonlinear_new/uz_pmsm_model_nonlinear_new/pmsm/q_current_LUT1'
Lookup table specification of breakpoints 2 must be set to 'Dialog' for HDL code generation."
The error message is from a LUT with the input option enabled. If i modify my Modell to match the example i mentioned earlier with the Pre-Lookup, the "interpolation from Pre-Lookup" Block is not HDL supported.
Is there a Simulink workaround to implement this type of dynamic LUT in the HDL-Coder?

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采纳的回答

Kiran Kintali
Kiran Kintali 2023-10-27
LUT with BP data as an input is a work in progress feature in HDL Coder. Reach out to tech support for your requirements.
Until the support is available out of the box in HDL Coder you can use first principles to build a subsystem with compatible HDL friendly blocks and generate HDL Code.
Please find attached a sample implementation for floating-point single precision LUT block with BP implemented as input data.
>> makehdl('LookupTableBPFromInPort/HDL_LUT_Dynamic')
### Working on the model LookupTableBPFromInPort
### Generating HDL for LookupTableBPFromInPort/HDL_LUT_Dynamic
### Using the config set for model LookupTableBPFromInPort for HDL code generation parameters.
### Running HDL checks on the model 'LookupTableBPFromInPort'.
### Begin compilation of the model 'LookupTableBPFromInPort'...
### Working on the model 'LookupTableBPFromInPort'...
### The code generation and optimization options you have chosen have introduced additional pipeline delays.
### The delay balancing feature has automatically inserted matching delays for compensation.
### The DUT requires an initial pipeline setup latency. Each output port experiences these additional delays.
### Output port 1: 62 cycles.
### Working on... GenerateModel
### Begin model generation 'gm_LookupTableBPFromInPort'...
### Rendering DUT with optimization related changes (IO, Area, Pipelining)...
### Model generation complete.
### Generated model saved at hdlsrc\LookupTableBPFromInPort\gm_LookupTableBPFromInPort.slx
### Begin VHDL Code Generation for 'LookupTableBPFromInPort'.
### Unused logic removed during HDL code generation. To highlight the logic removed, click the following MATLAB script: highlightRemovedDeadBlocks.m
### To clear highlighting, click the following MATLAB script: clearHighlightingRemovedDeadBlocks.m
### Working on LookupTableBPFromInPort/HDL_LUT_Dynamic/LinearInterpolationTopNetwork_inst/DirectLUTNetwork_inst/DirectLUTSubNetwork1_inst as hdlsrc\LookupTableBPFromInPort\DirectLUTSubNetwork1_inst.vhd.
### Working on LookupTableBPFromInPort/HDL_LUT_Dynamic/LinearInterpolationTopNetwork_inst/DirectLUTNetwork_inst/DirectLUTSubNetwork2_inst as hdlsrc\LookupTableBPFromInPort\DirectLUTSubNetwork2_inst.vhd.
### Working on LookupTableBPFromInPort/HDL_LUT_Dynamic/LinearInterpolationTopNetwork_inst/DirectLUTNetwork_inst as hdlsrc\LookupTableBPFromInPort\DirectLUTNetwork_inst.vhd.
### Working on LookupTableBPFromInPort/HDL_LUT_Dynamic/LinearInterpolationTopNetwork_inst/nfp_sub_single as hdlsrc\LookupTableBPFromInPort\nfp_sub_single.vhd.
### Working on LookupTableBPFromInPort/HDL_LUT_Dynamic/LinearInterpolationTopNetwork_inst/nfp_add_single as hdlsrc\LookupTableBPFromInPort\nfp_add_single.vhd.
### Working on LookupTableBPFromInPort/HDL_LUT_Dynamic/LinearInterpolationTopNetwork_inst/nfp_mul_single as hdlsrc\LookupTableBPFromInPort\nfp_mul_single.vhd.
### Working on LookupTableBPFromInPort/HDL_LUT_Dynamic/LinearInterpolationTopNetwork_inst/nfp_div_single as hdlsrc\LookupTableBPFromInPort\nfp_div_single.vhd.
### Working on LookupTableBPFromInPort/HDL_LUT_Dynamic/LinearInterpolationTopNetwork_inst as hdlsrc\LookupTableBPFromInPort\LinearInterpolationTopNetwork_inst.vhd.
### Working on LookupTableBPFromInPort/HDL_LUT_Dynamic/nfp_wire_single as hdlsrc\LookupTableBPFromInPort\nfp_wire_single.vhd.
### Working on LookupTableBPFromInPort/HDL_LUT_Dynamic as hdlsrc\LookupTableBPFromInPort\HDL_LUT_Dynamic.vhd.
### Generating package file hdlsrc\LookupTableBPFromInPort\HDL_LUT_Dynamic_pkg.vhd.
### Code Generation for 'LookupTableBPFromInPort' completed.
### Generating HTML files for code generation report at LookupTableBPFromInPort_codegen_rpt.html
### Creating HDL Code Generation Check Report HDL_LUT_Dynamic_report.html
### HDL check for 'LookupTableBPFromInPort' complete with 0 errors, 0 warnings, and 1 messages.
### HDL code generation complete.
>>
  1 个评论
Philipp
Philipp 2023-11-15
Thank you very much for taking the time to help me solve my problem. The example you provided seems to be the workaround I was looking for, and I will definitely try adapting it to my requirements.
For now, I have decided to approximate my LUT with the Curve Fitting Toolbox and a custom equation. There are already papers that describe using that method. As of now, the fitting seems to yield good results and comes with some other advantages. Thank you again for the answer.

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更多回答（1 个）

UDAYA PEDDIRAJU
UDAYA PEDDIRAJU 2023-10-27
Hello Philipp,
As per my understanding, it appears that you're trying to implement a dynamic Lookup Table (LUT) in HDL Coder for a nonlinear model of a Permanent Magnet Synchronous Motor (PMSM).
You've successfully simulated the model in Simulink, but you're encountering an issue during the final step of the HDL-Coder process.
Based on my observations, here are some suggestions:
  1. Lookup Table Breakpoints: The error message suggests that the breakpoint specification of your LUT needs to be set to 'Dialog' for HDL code generation. You might want to check the configuration of the LUT block and ensure that this setting is correctly configured.
  2. Unsupported Blocks: If certain blocks like "Interpolation from Pre-Lookup" are not supported by HDL, you might need to find alternative methods or blocks that perform a similar function and are supported by HDL.
  3. Dynamic LUT Implementation: Implementing a dynamic LUT in HDL Coder can be challenging. One possible workaround could be to use a “ROM (Read-Only Memory)” block instead of a LUT. The ROM block in Simulink supports HDL code generation and can be used to store precomputed constant values, like a LUT.
You can refer to the following documentation for more information: https://www.mathworks.com/help/simulink/slref/prelookup.html.
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Fahad
Fahad 2024-3-28
Hello Philipp,
I am also trying to implement 2D lut for PsiD , PsiQ maps based on Instantaneous values of ID, IQ. I have to mode it HIL system. The simscape model does not allow the n-d lut.
Were you able to solve the issue ? The link you posted in your intial message does not work.
Philipp
Philipp 2024-4-9
I do not know if my approach will work in simscape but in Simulink i indeed was able to solve the issue following the approach described in this paper:
https://ieeexplore.ieee.org/document/9743302?reason=concurrency
In the Paper analytic Prototype Functions are developed to approximate the flux-linkages.
For that, you could use the Curve Fitting Toolbox or directly do it in Matlab with known nonlinear regression functions like nlinfit or lsqnonlin.

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