Discrepancy between Simulink and hdl code behaviour
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I have modelled a control system in simulink.Used fixed point advisor to get all the datatypes. Runs fine in simulation , no issues. I generate hdl code. Flash the code into my FPGA and outputs are not stable. I Find a oscillatory behaviour. What could be the reason? My inputs are correct without noise.
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Kiran Kintali
2025-8-1
Could you reach out to tech support for assistance, or alternatively, share your model here? We’d be happy to take a look and provide feedback. HDL Coder ensures bit-true and cycle-accurate behavior that aligns with the original Simulink model.
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