清空筛选条件
清空筛选条件

Axi stream interface in Xilinx system generator

1 次查看（过去 30 天）
Shashi TG
Shashi TG 2017-2-19
Hello there, I am trying to implement the AXI stream interface to an image negative operation in system generator. I want to verify whether my design is correct to export as an IP, in terms of enabling the bus signals. (in simulation its working fine) thanks in advance.

请先登录，再回答此问题。

回答（0 个）

类别

在 Help Center 和 File Exchange 中查找有关 Code Generation 的更多信息

标签

产品

Community Treasure Hunt

Find the treasures in MATLAB Central and discover how the community can help you!

Start Hunting!

Translated by