hdl coder led blinking example

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Bence
Bence 2018-3-5
评论： Manish Shetty 2019-3-23
Hi!
I would like to complete this workflow example:
https://www.mathworks.com/help/hdlcoder/examples/define-and-register-custom-board-and-reference-design-for-soc-workflow.htmlefine and Register Custom Board and Reference Design for SoC Workflow
Like in the tutorial, I made a custom reference block design, without any AXI peripheral, because hdl coder will provide that. But at this point I am not able to validate my design in vivado, with axi_interconnect_0/M00_AXI port unconnected.
Later, when the hdl workflow advisor tries to "create project" (at workflow stage 4.1), the generated "vivado_create_prj.tcl" runs "validate design", and fails. (workspace/hdl_prj/vivado_ip_prj/vivado_create_prj.tcl)
Is there any way to workaround this issue?
  1 个评论
Manish Shetty
Manish Shetty 2019-3-23
I am having the same problem, did you get any workaround for this issue?

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采纳的回答

Wang Chen
Wang Chen 2018-3-6
编辑：Wang Chen 2018-3-6
Hi Bence, are you using Vivado 2017.4? We noticed that Vivado 2017.4 starts to error out on unconnected AXI Master ports in the validate_bd_design. If you are using Vivado 2017.2 or earlier versions, the "create project" should not error out.

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Bence
Bence 2018-3-6
Thank you for the fast reply! Yes, I am using Vivado 2017.4. Is there some way to access the script, that runs vivado (and "validate bd design"), when I click on "create project" in the workflow advisor?
  1 个评论
Wang Chen
Wang Chen 2018-3-6
Hi Bence, R2017b or R2018a version of HDL Coder does not support Vivado 2017.4 yet. Please use Vivado 2017.2 instead.
The Vivado 2017.4 will be supported in the future release, then the "create project" script will adapt to Vivado 2017.4.
HTH, Wang

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