problem generating hdl ip core of statflow using hdl workflow advisor: can't run the 1.2 task Set Target Reference Design

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imane RGUIB
imane RGUIB 2019-1-8
回答： Kiran Kintali 2020-8-23
hello friends, I need some help please,
I'm designing an I2C slave using stetflow, to make an HDL IP Core out of it using HDL Workflow Advisor.
The problem is when using events (falling_edge_sda, rising_edge_sda and a third input event (clk) to trigger the Stateflow chart at different time steps, as suggested here https://fr.mathworks.com/matlabcentral/answers/161726-how-can-i-trigger-a-transition-depending-on-an-input-s-rise-in-stateflow it works perfectly in simulation but it can't load the target hardware settings from model (it can't run the task 1.2 Set Target Reference Design of the HDL Workflow Advisor) as it gives this error
Could not apply model's setting to the Target Interface Table in Task 1.2 of the HDL Workflow Advisor for the following reason: network:propagateClockRate:ratesDontMatch: When propagating rates on <Network CtxName="slaveV2" RefNum="n1" UserName="slaveV2/SlaveI2C/Chart" RTTIClass ="class pir::Network"/>, signal <Signal CtxName="slaveV2" RefNum="s0" UserName="scl" RTTIClass ="class pir::Signal" Network="n1\> had rate 0.000000, while the trigger signal had rate 0.001000 Default or last valid setting is applied instead. If you are using the HDL Workflow Command Line Interface, consider making these changes in the HDL Workflow Advisor and using 'Export to Script...' to automatically generate the appropriate 'hdlset_param' commands.
So to work around this I deleted the 3 events and implemented the edge detection in Simulink with a "Detect Rise" block, and use the output of the "Detect Rise" as a regular Stateflow input, same for "Detect Fall" block (this solution worked fine with early versions of this project, so would like to stick to this one), but to my big surprise it blocks in the simulation phase giving the following error message:
Error in default port dimensions function of S-function 'slaveV3/SlaveI2C/Chart'. This function does not fully set the dimensions of output port 3
the slx model with events (slaveV2) and the one with the simulink blocks "DetectRise" and Detect Fall" (slaveV3) are attached below, as well as the file "myI2C_Scenario.mat" containing the scenarios of a supposed master signal sources "sda" and "scl" for the signal editor (I'm interested in the Scenario_readSlave for the moment). To test it for yourself, as mySlvAdr and dataT are parameters you can declare their values in the matlab command window: mySlvAdr=53 dataT = 3802
Please help me. This is so vital for me! Thank you for your time, and consideration! I have attached elements of the problem so you please be kind and take a look. very appreciated.
  1 个评论
imane RGUIB
imane RGUIB 2019-1-8
I have no clue about what might be the reasons behind this error:
Error in default port dimensions function of S-function 'slaveV3/SlaveI2C/Chart'. This function does not fully set the dimensions of output port 3
and I'm not sure I understand what does it mean

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回答（1 个）

Kiran Kintali
Kiran Kintali 2020-8-23
Unfortunately the attached model does not compile. Can you send updated instructions?
=== Update Diagram (Elapsed: 0.522 sec) ===
Error:Invalid setting in 'SlaveI2C/Chart' for parameter 'dataT'
Caused by:
Error evaluating Stateflow parameter data 'dataT' in its parent workspace.
Unrecognized function or variable 'dataT'.
Variable 'dataT' does not exist.
===
This example illustrates how to model an I2C controller using an I2C Master controller modeled using Stateflow™ blocks for configuring the audio codec chip.
IP Core Generation of an I2C Controller IP
  1. Model the I2C Master Controller using Stateflow blocks in Simulink
  2. Model the I2C Controller using the I2C Master Controller block for configuring the Audio Codec Chip
  3. Use the blackbox subsystem and bidirectional port features to handle tri-state logic in I2C IP core
  4. Use the IP Core Generation workflow to generate an IP core for the I2C Controller
https://www.mathworks.com/help/hdlcoder/examples/ip-core-generation-of-an-i2c-controller-ip-to-configure-the-audio-codec-chip.html

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