I've been working with the ADRV9361-Z7035 / ARDV1-CRR-BOB combo for a little while in Simulink and now am trying to build the bitstream and assign some data signals to some external ports. I thought all I had to do was assign the Port Name that was defined in my project to the correct FPGA pin ('V18' for IO_25_13_JX2). The system_wrapper.bit file is generated and downloaded to the ADRV9361-Z7035 board, then I open the software interface model that is created during step 4 of the HDL Workflow Advisor and attempt to run the project in External mode. The project builds successfully and indicates it is running on the hardware, however, I don't observe any data on the corresponding pin. Have I forgotten to enable/addres a key part of the design process?
EDIT: We also checked all breakout connections on headers P2 and P3 of the BOB. The data type assigned to the external target interface was an unsigned fixed 1-bit output (ufix1). We specified a cell array of {'V18'}.
