Port Width or Dimension Error: Signal wire adding an additional element in a simulink
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I'm woking with a model and the wire between an ouput port of a subsystem and the input port of a mux block adds an element, even though there's nothing else connected. Has anyone experienced this before? Do you have any tips in fixing this issue?
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Fangjun Jiang
2019-9-12
Check the dialog of the Mux block. It could be specified as [1 2]. Change it to be 2.
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