As per my understanding, you are unable to set the FPGA Data Capture – JTAG as the Target Platform Interface in the IP Core Generation workflow of HDL Workflow Advisor. There are two possible causes of why you cannot find the FPGA Data Capture – JTAG interface in your list:
- To use this interface, you must download a hardware support package for your FPGA board. For the information on how to download an FPGA board support package, see https://www.mathworks.com/help/hdlverifier/ug/download-fpga-board-support-package.html.
- FPGA Data Capture – JTAG interface is for test points signals and signals at the DUT output ports. This interface will not appear in the list for signals at the DUT input ports. For more information on this interface, see https://www.mathworks.com/help/hdlcoder/ug/custom-ip-core-generation.html#btt6hhg.
Thanks!