HDL Coder specific library in Simulink provides few HDL friendly blocks like RAM, FIFO etc., that are suited for HDL code generation but rest of the ~250blocks supported in Simulink including blocks like MATLAB function block, Stateflow, various subsystem semantic blocks (enabled, triggered, synchronous subsystems) allow you build any custom Math algorithm (with fixed-step discrete solver) and generate Synthesizable VHDL/Verilog code.
>> hdllib
See list of HDL Coder User Stories showcasing customers building ASIC/FPGA applications using HDL Coder generated code.
