Problems in converting Matlab code to VERILOG (HDL Coder)
8 次查看(过去 30 天)
显示 更早的评论
Hi I have been trying to generate VERILOG code for Automotive Adaptive Cruise control model. I am converting matlab code into verilog code so that I can implement it on FPGA. But the conversion is not possible.
I have some error like this: "Expected R to be one of these types: double. Instead it is of type Embedded.fi"
I do not understand this error completely. Some one please help me out in solving this.
Regards
1 个评论
回答(4 个)
Kiran Kintali
2013-9-20
Please contact technical support with the MATLAB code.
Most likely you are running into an operation or function which is not supported and needs to be replaced with a LUT or other approximation.
The error message seems to indicate variable 'R' cannot be fi type since it is not supported by Fixed-Point Designer.
0 个评论
Ravikanth
2013-9-21
3 个评论
Kaustubha Govind
2013-9-26
Is the type of the variable 'a' double or fi? I don't see that line in the file that you attached.
The message about parallelization seems to suggest that you are attempting to generate code from a PARFOR loop or some other Parallel Computing construct. Such parallelized code produces calls to OpenMP in generated code.
另请参阅
产品
Community Treasure Hunt
Find the treasures in MATLAB Central and discover how the community can help you!
Start Hunting!