How to create a FFT ipcore for Zynq using Simulink HDL Coder?
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there is an error message "not support for frame based module"? is there any other solution for exporting signal processing blocks to Zynq?
Thank
Owen
采纳的回答
Tim McBrayer
2013-9-24
编辑：Tim McBrayer
2013-9-24
A frame-based block takes an entire array of data as an input in one time step. This is not very hardware friendly; for hardware, you need to stream your data in one array element at a time. HDL Coder has a "HDL Streaming FFT" block and a "HDL FFT" block designed specifically for hardware implementation. You will need to modify your design to interface with one of these blocks. To access this block in R2013a:
>> hdllib
This library contains all blocks that support HDL code generation.
- Double-click on "HDL Demo Library".
- Choose the "HDL Streaming FFT" or "HDL FFT" block.
A more direct route to the block is to open the HDL Demo Library directly:
>> hdldemolib
更多回答（1 个）
Kiran Kintali
2013-9-24
0 个投票
Are you using "HDL FFT" or "HDL Streaming FFT" blocks shipping with HDLCoder? These support efficient HDL Code generation and using the HDL Workflow Advisor you can target a model using these blocks to Zynq.
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