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SUHANYA M S


Last seen: 8 months 前 |  自 2018 起处于活动状态

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How to find the LM_LICENSE_FILE in an institutional license (online verification)
My institute provides the MATLAB license. So I do not have a license.dat file for the MATLAB 2020a installed. I'm trying to ge...

8 months 前 | 1 个回答 | 0

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Extract variables saved to workspace from simulink
Using the "To Workspace" block, many signals of different sampling time are saved to the workspace as "Structure with time". The...

1 year 前 | 1 个回答 | 0

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Large MATLAB Figure (>1 GB)
I have MATLAB Figures of size 1.1 GB. The reason is the simulaiton sample time is 10ns, and data type is double (64 bit) in Xili...

1 year 前 | 1 个回答 | 0

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Error in Divide Block - System Generator
Has anyone seen this error when using System Generator Divide block during compilation? Input port 'a' is expected to be illega...

2 years 前 | 1 个回答 | 0

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Remainder of a division operation in System Generator
I have an integrator which gives the running value of angle theta. To find the sine/cosine of this angle using the SysGen ROM bl...

2 years 前 | 2 个回答 | 0

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Importing IPs from Vivado to Simulink
It's possible to generate IPs in Simulink using HDL Coder/System Generator for use in a Vivado project. Is it possible to impo...

2 years 前 | 1 个回答 | 0

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Is it possible to do co-cimulation for target Nexys A7?
I've seen/read co-simulation demos/documents by MATLAB for Zybo and Kintex devices. Is it possible to do hardware co-simulation ...

2 years 前 | 1 个回答 | 0

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SiC MOSFET model -reg
Went through the model of SiC MOSFET in the example application at https://in.mathworks.com/help/sps/ug/on-board-charger-for-two...

2 years 前 | 1 个回答 | 0

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Blocks for HDL Code generation
What are the toolboxes in Simulink that can be used to generate HDL netlist? What is the difference between DSP System Toolbox...

2 years 前 | 1 个回答 | 0

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Old MATLAB license which was deactivated is detected on startup
I deactivated an old license for my user login recently, and enabled a new one. When I launch MATLAB from the MATLAB app, or fro...

2 years 前 | 0 个回答 | 0

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XADC in System Generator/Model Composer for MATLAB
Hi. I have designed and simulated my entire control logic (using Xilinx blockset of System Generator-Model Composer for MATLAB)...

2 years 前 | 1 个回答 | 0

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System Generator for Digilent Nexys A7 board with Artix7 100T processor
I have the Digilent Nexys A7 board with the Artix7 100T processor. In System Generator, the boards with Artix7 200T processors a...

3 years 前 | 1 个回答 | 0

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Extract data from figure files not working in 2017a
I was able to extract data from .fig files until last week using the Figure Property editor and various solutions given on this ...

3 years 前 | 1 个回答 | 0

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Unable to configure "clock period for FPGA" in System Generator block
Hi ! I use an Altium Nanoboard 3000, which has an on-board Spartan 3AN FPGA. As support has it, Xilinx 10 to 14.4 alone support...

6 years 前 | 0 个回答 | 0

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